There are four major processes for die attach, namely the metal-filled polymeric die attach, metal/frit die attach, eutectic bond die attach and solder-based die attach. Among these processes, the solder-based die attach is widely used because it is highly reliable with ease of processing. Furthermore, the solder used in the solder-based die attach process has excellent thermal and electrical conductivity, as well as low coefficient of thermal expansion (CTE) mismatch.
However, voiding in the solder has been a problem encountered in the solder-based die attach process. Voiding is a result of various parameters of the solder-based die attach process, such as flux activity (e.g., out-gassing), choice of alloy and deposit size. If voids are present at the interface of the solder and back side metallization of a chip, delamination of the chip from the solder may occur. Furthermore, the presence of the void also reduces thermal and electrical conductivity, resulting in higher electrical resistance and poor heat dissipation. Therefore, when the chip is in operation, it invariably heats up locally at the vicinity of the void due to poor heat dissipation. As a consequence, the chip may be damaged during operation. These problems may be more prominent for power devices which operate at larger current.
Therefore, there is a need for an improved process that addresses the above-mentioned challenges.